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0.13-/Um 32-Mb/64-Mb Embedded Dram Core with High Efficient Redundancy and Enhanced Testability by
  • Kikukawa, Hirohito
  • tomishima, Shigeki
  • Tsuji, Takaharu
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Embedded Timing Analysis : A Soc Intrastriucture by
  • Tabatabaei, Sassan
  • Ivanov, andre
Source: Ieee Design and Test of Computers
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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