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		A 500-Mhz Multi-Banked Compilable Dram Macro with Direct Write and Programmable Pipelining by Barth, Josef Anand, Darren Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A 5.6-Ns Random Cycle 144-Mb Dram with 1.4 Gb/S/Pin and Ddr3-Sram Interface by Anand, Darren Barth, John Pilo, Harold Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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