A 5.6-Ns Random Cycle 144-Mb Dram with 1.4 Gb/S/Pin and Ddr3-Sram Interface

By: Material type: ArticleArticleDescription: 1974-1980 pSubject(s): In: Ieee Journal of Solid-State Circuits
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Articles Articles Periodical Section Vol.38, No.11 (Nov. 2003) Available

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