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A High Performance Hevc De-Blocking Filter and Sao Architecture for Uhdtv Decoder by
  • Zhu, Jiayi
  • Zhou, Dajiang
  • Goto, Satoshi
Source: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A 5.83 Pj/Bit/Iteration High-Paraliel Performance-Aware Ldpc Decoder Ip Core Design for Wimax in 65 Nm Cmos by
  • Zhao, Xiongxin
  • Chen, Zhixiang
  • Peng, Xiao
  • Zhou, Dajiang
Source: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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