A 6-Ghz 16-Kb Li Cache in A 100-Mn Dual-Vt Technologyusing A Bitline Leakage Reduction (Blr) Technique

By: Material type: ArticleArticleDescription: 839-842 pSubject(s): In: Ieee Journal of Solid-State Circuits
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Articles Articles Periodical Section Vol.38, No.05 (May. 2003) Available

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