Glitch Power Minimization By Selective Gate Freezing (Record no. 781298)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00416nab a2200121Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 230808s2000 |||||||f |||| 00| 0 eng d |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Benini, L |
| 9 (RLIN) | 812908 |
| 245 #0 - TITLE STATEMENT | |
| Title | Glitch Power Minimization By Selective Gate Freezing |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 287-298 p. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Cmos Digital Integrated Circuits, |
| 9 (RLIN) | 758819 |
| 773 ## - HOST ITEM ENTRY | |
| Place, publisher, and date of publication | 2000 |
| Title | Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems |
| International Standard Serial Number | 10638210 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Articles |
| -- | 51 |
| -- | ABUL KALAM Library |
| Not for loan | Home library | Serial Enumeration / chronology | Total Checkouts | Date last seen | Koha item type |
|---|---|---|---|---|---|
| Engr Abul Kalam Library | Vol.08, No.03 (Jun. 2000) | 20/08/2023 | Articles |