Rigorous Electromagnetic Modeling of Chip-To-Package First-Level Interconnections (Record no. 748778)

MARC details
000 -LEADER
fixed length control field 00610nab a2200169Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s1993 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Tsuei, Y. G
9 (RLIN) 788651
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Cangeliaris, andreas C.
9 (RLIN) 777364
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Prince, John L.
9 (RLIN) 777362
245 #0 - TITLE STATEMENT
Title Rigorous Electromagnetic Modeling of Chip-To-Package First-Level Interconnections
300 ## - PHYSICAL DESCRIPTION
Extent 876-883 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Rigorous Dynamic Model
9 (RLIN) 788654
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Modeling
9 (RLIN) 15553
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Chip-To-Chip Interconnects
9 (RLIN) 760790
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 1993
Title IEEE Transactions on Components Hybrids and Manufacturing Technology
International Standard Serial Number 01486411
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.16, No.08 (Dec. 1993)   19/08/2023 Articles
Visit counter For Websites

Copyright © 
Engr Abul Kalam Library, NEDUET, 2024