Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi (Record no. 740558)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00547nab a2200157Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 230808s2001 |||||||f |||| 00| 0 eng d |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Osada, Kenichi |
| 9 (RLIN) | 757963 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Shin, Jinuk Luke |
| 9 (RLIN) | 769062 |
| 245 #0 - TITLE STATEMENT | |
| Title | Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1738-1744 p. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Cache Memory |
| 9 (RLIN) | 143358 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Low Power |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Self-Timing |
| 9 (RLIN) | 769064 |
| 773 ## - HOST ITEM ENTRY | |
| Place, publisher, and date of publication | 2001 |
| Title | IEEE Journal of Solid-State Circuits |
| International Standard Serial Number | 00189200 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Articles |
| -- | 51 |
| -- | ABUL KALAM Library |
| Not for loan | Home library | Serial Enumeration / chronology | Total Checkouts | Date last seen | Koha item type |
|---|---|---|---|---|---|
| Engr Abul Kalam Library | Vol.36, No.11 (Nov. 2001) | 19/08/2023 | Articles |