Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi
Osada, Kenichi Shin, Jinuk Luke
Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi - 1738-1744 p.
Cache Memory
Low Power
Self-Timing
Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi - 1738-1744 p.
Cache Memory
Low Power
Self-Timing