000 00416nab a2200121Ia 4500
008 230808s2000 |||||||f |||| 00| 0 eng d
100 _aBenini, L
_9812908
245 0 _aGlitch Power Minimization By Selective Gate Freezing
300 _a287-298 p.
650 _aCmos Digital Integrated Circuits,
_9758819
773 _d2000
_tIeee Transactions on Very Large Scale Intergration (Vlsi) Systems
_x10638210
942 _cART
_o51
_pABUL KALAM Library
999 _c781298
_d781298