| 000 | 00803nam a2200229Ia 4500 | ||
|---|---|---|---|
| 008 | 090911s2008||||xx |||||||||||||| ||eng|| | ||
| 020 | _a9780470060704 | ||
| 022 | _l978-0-470-06070-4 | ||
| 041 | _aeng | ||
| 082 |
_a621.395 _bMIN |
||
| 100 |
_aMinns, Peter _eAU _977666 |
||
| 245 | 0 | _aFsm Based Digital Design Using Verilog HDL | |
| 260 |
_aChichester : _bJohn Wiley, _cc2008 |
||
| 300 |
_aXIII, 391 p. _b: ill _e+1cd |
||
| 504 | _aNY | ||
| 650 |
_aElectronic Circuit Design Data Processing _977667 |
||
| 650 |
_aPower Electronics Data Processing _977668 |
||
| 650 |
_aVerilog Computer Hardware Description Language _977549 |
||
| 700 |
_aElliott, Ian _eAU _977669 |
||
| 856 |
_yTable of Contents _uhttps://eaklibrary.neduet.edu.pk:8443/catalog/bk/books/toc/978-0-470-06070-4.pdf |
||
| 942 |
_cBOO _o51 _pAbul Kalam Library |
||
| 999 |
_c372569 _d372569 |
||