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		Design of Synchronous and Asynchronous Variable-Latency Pipelined Multipliers by Olivieri, M Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A Low Vi Implementation of An Lplv Digital Filter Core for Protable Audio Applications. by Salama, C. A. T Suvakovic, D Source: Ieee Transactions on Circuits and Systems-Ii: Express Briefs ( for merly: Analog & Digital Signal Processing) Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Some Experiments Abour Wave Pipelining on Fpga'S. by Buedo, S. L Boemo, E. I Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Hight-Level Address Optimization and Synthesis Techniques for Data-Transfer-Intrsive Applications. by Miranda, M. A Catthoor, F. V. M Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		on Portable Macrocell Fpu Generators for Division and Square Root Operators Complying toFull Ieee - 754 Standard. by Houelle, A Aberbour, M Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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