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Locally Clocked Pipelines and Dynamic Logic by
  • Hoyer, Klaus W
  • Yee, G
  • Sechen, C
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Energy Efficient Noise-tolerant Dynamic Styles for Scaled Down Cmos and Mtcmos Technologies by
  • Anis, M.H
  • Allam, M
  • Elmasry, M. I
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Low-Power Cmos with Subvolt Supply Voltages by
  • Stan, M. R
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Partial Bus-Invert Coding for Power Optimization of Application-Specific Systems by
  • Shin, Y
  • Chae, S.-I
  • Choi, K
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Dual-Threshold Voltage Assignment with Transister Sizing for Low Power Cmos Circuits by
  • Pant, P
  • Roy, R. K
  • Chatterjee, A
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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