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A Vcdl-Based 60-760-Mhz Dual-Loop Dli with Infinite Phase-Shift Capability and Adaptive-Bandwidth Scheme by
  • Bae, Seung-Jun
  • Chi, Hyung-Joon
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A 250-Mb/S/Pin, 1-Gb Double-Data-Rate Sdram with a Bidirectional Delay and an Interbank Shared Redundancy Scheme by
  • Takai, Yasuhiro
  • Fujita, Mamoru
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
The Accuracy OfClock Synchronization Achieved by Tempo in Berkeley Unix 4. 3bsd by
  • Zatti, Stefano
  • Guselia, Riccardo
Source: IEEE Transactions on Software Engineering
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A High-Resolution Synchronous Mirror Delay Using Successive Approximation Registrer by
  • Sung, Kihyuk
  • Kim, Lee-Sup
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Clock Synchronization for Wavelet-Based Multirate Transmissions. by
  • Luise, M
  • Reggiannini, R
Source: Ieee Transactions on Communications
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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