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Efficient Recursive Multiply Architecture for Fpgas by
  • Perri, S
  • Corsonello, P
  • Cocorullo, G
Source: IET:IEE: Electronics Letters
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
An Efficient Self-Timid Adder Ealized Using Conventional Cmos Standard Cells by
  • Perri, Stefania
  • Corsonello, P
Source: International Journal of Electronics
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Vlsi Circuits for Low-Power High-Speed Asynchronous Addition by
  • Perri, S
  • Corsonello, P
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
64-Bite Reconfigurable Adder for Low Power Media Processing by
  • Perri, S
  • Corsonello, P
  • Cocorullo, G
Source: IET:IEE: Electronics Letters
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Area-Time-Power Tradeoff in Cellular Arrays Vlsi Implementations. by
  • Cocorullo, G
  • Perri, S
  • Corsonello, P
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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