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A Low-Noise Phase-Locked Loop Design by Loop Bandwidth Optimization by
  • lim, Kyoohyun
  • Park, Chan-Hong
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A 1. 8-Ghz Self-Calibrated Phase-Locked Loop with Precise I/Q Matching by
  • Park, Chan-Hong
  • Kim, Ook
  • Kim, Beomsup
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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