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A Low-Power Four-Transistor Sram Celi with a Stacked Vertical Poly-Silicon Pmos and a Dual-Word-Voltage Scheme by
  • Kotabe, Akira
  • Osada, Kenichi
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi by
  • Osada, Kenichi
  • Shin, Jinuk Luke
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
0.4-V Logic-Library-Friendly Sram Array Using Rectangular-Diffusion Cell and Delta-Boosted-Array Voltage Scheme by
  • Yamaoka, M
  • Osada, Kenichi
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Sram Immunity to Cosmic-Ray-Induced Multierrors Based on Analysis of An Induced Parasitic Bipolar Effect by
  • Osada, Kenichi
  • Yamaguchi, Ken
  • Kawahara, Takayuki
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
16.7-Fa/Cell Tunnel-Leakage-Suppressed 16-Mb Sram for Handling Cosmic-Ray-Induced Multierrors by
  • Osada, Kenichi
  • Saitoh, Yoshikazu
  • Ibe, Eishi
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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