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		A Low-Power Four-Transistor Sram Celi with a Stacked Vertical Poly-Silicon Pmos and a Dual-Word-Voltage Scheme by Kotabe, Akira Osada, Kenichi Source: IEEE Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A 1.2-V 1.5-Gb/S 72-Mb Ddr3 Sram by Cho, Uk-Rae Yoon, Yong-Jin Ahn, Kee-Sik Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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