Anand, Darren Barth, John Pilo, Harold <br/><br/>
A 5.6-Ns Random Cycle 144-Mb Dram with 1.4 Gb/S/Pin and Ddr3-Sram Interface 

 - 1974-1980 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Memory<br/>Cache Memory<br/>Embedded Dram