Lin, Su-Hon Yang, Shyue-Wen Sheu, Ming-Hwa <br/><br/>
An Efficient Vlsi Design  for  A Residue to Binary Converter  for  General Balance Moduli 

 - 152-155 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Dynamic Range<br/>Moduli Set<br/>Balanced Bit-Width