Horiuchi, M Teshima, Kszuya Yamaguchi, Ken <br/><br/>
High-Current Smali-Parasitic-Capacitance Mosfet on a Poly-Si Interlayed (Psi-)Soi Wafer 

 - 1111-1115 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Poly-Si Tft<br/>Soi Mosfet<br/>Subthreshold-Turn-Off Properties