TY  - SER
AU  - Osada, Kenichi
AU  - Shin, Jinuk Luke
TI  - Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi
KW  - Cache Memory
KW  - Low Power
KW  - Self-Timing
ER  -