Osada, Kenichi Shin, Jinuk Luke <br/><br/>
Universal-Vdd 0.65-2.0-V 32-Kb Cache Using a Voltage-Adapted Timing-Generation Scheme and lithographicaliy Symmetrical Celi 

 - 1738-1744 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Cache Memory<br/>Low Power<br/>Self-Timing