Tomita, Yasumoto Kibune, Masaya <br/><br/>
A 10-Gb/S Receiver with  Series Equalizer and on-Chip Isi Monitor in 0.11-Um Cmos 

 - 986-993 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Clock and Data Recovery (Cdr)<br/>Cmos<br/>Intersymbol Interference (Isi )