Pabdian, M. Karthigai Balamurugan, N. B. <br/><br/>
Analytical Threshold Voltage Modeling of Surrounding Gate Ksilicon Nanowire Transistors with  Didfferent Geometries 

 - 2079-2088 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Junction Based Cylindrical Surrounding Gate Silicon Nanowire Transistor<br/>Drain Bias<br/>Channel Length Modulation