Architectural Strategies for Low-Power Vlsi Turbo Decoders (Record no. 766200)

MARC details
000 -LEADER
fixed length control field 00452nab a2200133Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2002 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Masera, Guido
9 (RLIN) 813269
245 #0 - TITLE STATEMENT
Title Architectural Strategies for Low-Power Vlsi Turbo Decoders
300 ## - PHYSICAL DESCRIPTION
Extent 279-285 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element High Performance
9 (RLIN) 170051
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Low-Power-Design
9 (RLIN) 724104
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2002
Title Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
International Standard Serial Number 10638210
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.10, No.03 (Jun. 2002)   19/08/2023 Articles