A 250-Mb/S/Pin, 1-Gb Double-Data-Rate Sdram with a Bidirectional Delay and an Interbank Shared Redundancy Scheme (Record no. 745843)

MARC details
000 -LEADER
fixed length control field 00551nab a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2000 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Takai, Yasuhiro
9 (RLIN) 781836
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Fujita, Mamoru
9 (RLIN) 781838
245 #2 - TITLE STATEMENT
Title A 250-Mb/S/Pin, 1-Gb Double-Data-Rate Sdram with a Bidirectional Delay and an Interbank Shared Redundancy Scheme
300 ## - PHYSICAL DESCRIPTION
Extent 149-162 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Clock
9 (RLIN) 757960
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Clock Generator
9 (RLIN) 758956
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Clock Synchronization
9 (RLIN) 758353
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2000
Title IEEE Journal of Solid-State Circuits
International Standard Serial Number 00189200
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
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-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.35, No.02 (Feb. 2000)   19/08/2023 Articles