A Design for High-Speed Low-Power Cmos Fuliy Paraliel Content-Addressable Memory Macros (Record no. 741078)

MARC details
000 -LEADER
fixed length control field 00545nab a2200169Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2001 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Miyatake, Hisatada
9 (RLIN) 770394
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Tanaka, Masahiro
9 (RLIN) 770395
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Mori, Yotaro
9 (RLIN) 770396
245 #2 - TITLE STATEMENT
Title A Design for High-Speed Low-Power Cmos Fuliy Paraliel Content-Addressable Memory Macros
300 ## - PHYSICAL DESCRIPTION
Extent 956-968 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Asic
9 (RLIN) 714157
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Associative Memory
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Cam
9 (RLIN) 706827
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2001
Title IEEE Journal of Solid-State Circuits
International Standard Serial Number 00189200
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
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  Engr Abul Kalam Library Vol.36, No.06 (Jun. 2001)   19/08/2023 Articles
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