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Substrate-Triggered Technique for on-Chip Esd Protection Design in A 0.18-Um Salicided Cmos Process

Ker, Ming-Dou

Substrate-Triggered Technique for on-Chip Esd Protection Design in A 0.18-Um Salicided Cmos Process - 1050-1057 p.

Subjects--Topical Terms:
Electrostatic Discharge

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