An All-Digital Pll for Frequency Multiplication By 4 to 1022 with Seven-Cycle Lock Time

Watanabe, Takamoto Yamauchi, Shigenori

An All-Digital Pll for Frequency Multiplication By 4 to 1022 with Seven-Cycle Lock Time - 198-204 p.


Cmos
Phase-Locked Loop (Pll)
Synthesizer
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