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Low Jitter and Multirate Clock and Data Recovery Circuit Using A Msadll for Chip-to-Chip Interconnection

Chang, Hsiang-Hui

Low Jitter and Multirate Clock and Data Recovery Circuit Using A Msadll for Chip-to-Chip Interconnection - 2356-2364 p.

Subjects--Topical Terms:
Clock and Data Recovery Circuit (Cdr)
Delay-Locked Loop

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